Intel anuncia nuevos productos CASCADE LAKE XEONS de 48 cores

En una ironía increíble. Intel ha anunciado su nueva gama de productos CASCADE LAKE.


Cual es lo ironico? que después de criticar seriamente y hacer campaña en contra del sistema MCM de AMD (multi dies en el mismo chip).
Intel con sus problemas de yields y baja capacidad de producción, deicidio usar "pegamento" (así fue como intel insulto el sistema MCM de AMD) para pegar 2 xeones de 22 Cores en un solo chip.



Los datos todavía no son 100% confirmados, pero se dice que es posible que estos chips tengan 48 cores y 12 canales de memoria (6 canales por Die de 24 cores).
Lo cual requeriría tarjetas madres completamente nuevas. Ya que tendrán requerimientos de enfriamiento y eléctricos muy superiores a los chips intel actuales.
Incluyendo el socket, lo cual se reporta que tendrá una bestial cantidad de 5903 pines.

Otra de las razones para las que intel decidio "olvidar" su campaña negativa en contra de los sistemas MCM como el de AMD, es que el sistema 10nm (el cual intel ha tenido problemas por mas de 4 años) no esta ni listo ni en estado como para producir procesadores en masa usando esta tecnología. Lo cual indica que Intel tendrá que seguir usando 14nm. Y probablemente no tendrá ninguna mitigacion para hyperthreading, ya que intel solo menciona numero de cores y no threads. Lo cual significaría que es probable que estos chips no tendrán hyperthreading.

Intel has announced the next family of Xeon processors that it plans to ship in the first half of next year. The new parts represent a substantial upgrade over current Xeon chips, with up to 48 cores and 12 DDR4 memory channels per socket, supporting up to two sockets.

These processors will likely be the top-end Cascade Lake processors; Intel is labelling them "Cascade Lake Advanced Performance," with a higher level of performance than the Xeon Scalable Processors (SP) below them. The current Xeon SP chips use a monolithic die, with up to 28 cores and 56 threads. Cascade Lake AP will instead be a multi-chip processor with multiple dies contained with in a single package. AMD is using a similar approach for its comparable products; the Epyc processors use four dies in each package, with each die having 8 cores.

The switch to a multi-chip design is likely driven by necessity: as the dies become bigger and bigger it becomes more and more likely that they'll contain a defect. Using several smaller dies helps avoid these defects. Because Intel's 10nm manufacturing process isn't yet good enough for mass market production, the new Xeons will continue to use a version of the company's 14nm process. Intel hasn't yet revealed what the topology within each package will be, so the exact distribution of those cores and memory channels between chips is as yet unknown. The enormous number of memory channels will demand an enormous socket, currently believed to be a 5903 pin connector.

Overall, the company is claiming about a 20 percent performance improvement over the current Xeon SPs and 240 percent over AMD's Epyc, with bigger gains coming in workloads that are particularly memory bandwidth intensive. The new processors will include a number of new AVX512 instructions designed to enhance the performance of running neural networks; Intel reckons that this will improve the performance of image matching algorithms by as much as 17 times faster than the current Xeon SP family. The smallprint for the performance comparisons notes that hyperthreading/simultaneous multithreading is disabled on both the Xeon SP and Epyc systems.

With the announcement of the 48-core Xeon "Cascade Lake" Advanced Performance Intel intends to put the competition in its place. Intel announced the 2019 processor as a multi-chip package (MCP) presumably from two 24-core dies. Each processor contains memory controllers for 12 DDR4 SDRAM channels. A two-socket system with two of these "CLX-AP" telephones thus provides 96 cores and 24 RAM channels.

AMD currently delivers up to 32 cores per processor in the first Epyc generation. The promised for 2019 7 nm "Rome" -Epyc, however, could bring 64 cores. However, he will continue to have eight RAM channels because he should run on the current Epyc motherboards.

Cambien anuncio nuevos chips basados en procesadores de escritorio de 6 cores para servidores básicos.

At the other end of the performance spectrum, Intel said that its latest crop of Xeon E-2100 processors is shipping today. These are single socket chips intended for small servers, offering up to 6 cores and 12 threads per chip. Functionally, they're Xeon-branded versions of the mainstream Core processors, with the only notable difference being that they support ECC memory, and use a server variant of the chipset.

arstechnica.com/gadgets/2018/11/intel-announces-cascade-lake-xeons-48-cores-and-12-channel-memory-per-socket/
www.heise.de/newsticker/meldung/Intel-Xeon-AP-bekommt-48-Kerne-4209966.html